Better defaults, compatibility for SDIO + STM32 (#20570)
This commit is contained in:
Victor Oliveira
GitHub
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commit
2ce9fa4b9c
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@ -88,18 +88,37 @@
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MKS Robin board seems to have stable SDIO with BusWide 1bit and ClockDiv 8 i.e. 4.8MHz SDIO clock frequency
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Additional testing is required as there are clearly some 4bit initialization problems
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Add -DTRANSFER_CLOCK_DIV=8 to build parameters to improve SDIO stability
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*/
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#ifndef TRANSFER_CLOCK_DIV
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#define TRANSFER_CLOCK_DIV (uint8_t(SDIO_INIT_CLK_DIV) / 40)
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#endif
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#ifndef USBD_OK
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#define USBD_OK 0
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#endif
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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#ifndef SDIO_CLOCK
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#define SDIO_CLOCK 18000000 /* 18 MHz */
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#endif
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// SDIO retries, configurable. Default is 3, from STM32F1
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#ifndef SDIO_READ_RETRIES
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#define SDIO_READ_RETRIES 3
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#endif
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// SDIO Max Clock (naming from STM Manual, don't change)
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#define SDIOCLK 48000000
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static uint32_t clock_to_divider(uint32_t clk) {
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// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
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// Also limited to no more than 48Mhz (SDIOCLK).
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const uint32_t pclk2 = HAL_RCC_GetPCLK2Freq();
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clk = min(clk, (uint32_t)(pclk2 * 8 / 3));
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clk = min(clk, (uint32_t)SDIOCLK);
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// Round up divider, so we don't run the card over the speed supported,
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// and subtract by 2, because STM32 will add 2, as written in the manual:
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// SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]
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return pclk2 / clk + (pclk2 % clk != 0) - 2;
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}
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void go_to_transfer_speed() {
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SD_InitTypeDef Init;
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@ -109,7 +128,7 @@
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Init.ClockPowerSave = hsd.Init.ClockPowerSave;
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Init.BusWide = hsd.Init.BusWide;
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Init.HardwareFlowControl = hsd.Init.HardwareFlowControl;
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Init.ClockDiv = TRANSFER_CLOCK_DIV;
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Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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/* Initialize SDIO peripheral interface with default configuration */
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SDIO_Init(hsd.Instance, Init);
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@ -155,38 +174,25 @@
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//Initialize the SDIO (with initial <400Khz Clock)
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tempreg = 0; //Reset value
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tempreg |= SDIO_CLKCR_CLKEN; // Clock enabled
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tempreg |= (uint32_t)0x76; // Clock Divider. Clock = 48000 / (118 + 2) = 400Khz
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tempreg |= SDIO_INIT_CLK_DIV; // Clock Divider. Clock = 48000 / (118 + 2) = 400Khz
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// Keep the rest at 0 => HW_Flow Disabled, Rising Clock Edge, Disable CLK ByPass, Bus Width = 0, Power save Disable
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SDIO->CLKCR = tempreg;
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// Power up the SDIO
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SDIO->POWER = 0x03;
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SDIO_PowerState_ON(SDIO);
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}
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
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UNUSED(hsd); /* Prevent unused argument(s) compilation warning */
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UNUSED(hsd); // Prevent unused argument(s) compilation warning
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__HAL_RCC_SDIO_CLK_ENABLE(); // turn on SDIO clock
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}
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constexpr uint8_t SD_RETRY_COUNT = TERN(SD_CHECK_AND_RETRY, 3, 1);
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bool SDIO_Init() {
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//init SDIO and get SD card info
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uint8_t retryCnt = SD_RETRY_COUNT;
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uint8_t retryCnt = SDIO_READ_RETRIES;
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bool status;
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hsd.Instance = SDIO;
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hsd.State = (HAL_SD_StateTypeDef) 0; // HAL_SD_STATE_RESET
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/*
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hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
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hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
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hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
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hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
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hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
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hsd.Init.ClockDiv = 8;
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*/
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hsd.State = HAL_SD_STATE_RESET;
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SD_LowLevel_Init();
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@ -258,7 +264,7 @@
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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hsd.Instance = SDIO;
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uint8_t retryCnt = SD_RETRY_COUNT;
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uint8_t retryCnt = SDIO_READ_RETRIES;
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bool status;
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for (;;) {
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@ -307,7 +313,7 @@
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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hsd.Instance = SDIO;
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uint8_t retryCnt = SD_RETRY_COUNT;
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uint8_t retryCnt = SDIO_READ_RETRIES;
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bool status;
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for (;;) {
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status = (bool) HAL_SD_WriteBlocks(&hsd, (uint8_t*)src, block, 1, 500); // write one 512 byte block with 500mS timeout
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@ -165,6 +165,8 @@
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#define SPI_DEVICE 2
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#define SDIO_SUPPORT
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#define SDIO_CLOCK 4500000
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#define SDIO_READ_RETRIES 16
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#if ENABLED(SDIO_SUPPORT)
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#define SCK_PIN PB13 // SPI2
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#define MISO_PIN PB14 // SPI2
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@ -142,6 +142,7 @@
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// SD support
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//
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#define SDIO_SUPPORT
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#define SDIO_CLOCK 4800000
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//
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// Misc. Functions
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@ -156,6 +156,7 @@
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// SD support
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//
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#define SDIO_SUPPORT
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#define SDIO_CLOCK 4800000
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#define SCK_PIN PC12 //confirmed working
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#define MISO_PIN PC8 //confirmed working
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@ -127,6 +127,7 @@
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//
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#define SDIO_SUPPORT
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#define SD_DETECT_PIN PA8
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#define SDIO_CLOCK 4800000
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//
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// LCD / Controller
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@ -973,7 +973,7 @@ board_build.offset = 0x7000
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board_build.encrypt = Yes
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board_build.firmware = Robin.bin
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build_flags = ${common_stm32.build_flags}
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-DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8 -DTIMER_SERIAL=TIM5
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-DENABLE_HWSERIAL3 -DTIMER_SERIAL=TIM5
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build_unflags = ${common_stm32.build_unflags}
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-DUSBCON -DUSBD_USE_CDC
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extra_scripts = ${common.extra_scripts}
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@ -1149,7 +1149,7 @@ upload_protocol = jlink
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[env:flsun_hispeedv1]
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platform = ${common_stm32.platform}
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extends = common_stm32
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build_flags = ${common_stm32.build_flags} -DMCU_STM32F103VE -DSS_TIMER=4 -DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8
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build_flags = ${common_stm32.build_flags} -DMCU_STM32F103VE -DSS_TIMER=4 -DENABLE_HWSERIAL3
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board = genericSTM32F103VE
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board_build.core = stm32
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board_build.variant = MARLIN_F103Vx
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@ -1321,7 +1321,7 @@ extra_scripts = ${common.extra_scripts}
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build_flags = ${common_stm32.build_flags}
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-DSTM32F4 -DSTM32F4xx -DTARGET_STM32F4
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-DDISABLE_GENERIC_SERIALUSB -DARDUINO_ARCH_STM32 -DARDUINO_LERDGE
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-DTRANSFER_CLOCK_DIV=8 -DHAL_SRAM_MODULE_ENABLED
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-DHAL_SRAM_MODULE_ENABLED
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build_unflags = ${common_stm32.build_unflags} -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
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#
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@ -1369,7 +1369,7 @@ monitor_speed = 500000
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[env:mks_robin_nano35_stm32]
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platform = ${common_stm32.platform}
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extends = common_stm32
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build_flags = ${common_stm32.build_flags} -DMCU_STM32F103VE -DSS_TIMER=4 -DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8
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build_flags = ${common_stm32.build_flags} -DMCU_STM32F103VE -DSS_TIMER=4 -DENABLE_HWSERIAL3
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board = genericSTM32F103VE
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board_build.core = stm32
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board_build.variant = MARLIN_F103Vx
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