parent
145ab7b1ec
commit
4a89ef6273
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@ -1277,7 +1277,7 @@
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#if LCD_IS_SERIAL_HOST && !defined(LCD_SERIAL_PORT)
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#if MB(BTT_SKR_MINI_E3_V1_0, BTT_SKR_MINI_E3_V1_2, BTT_SKR_MINI_E3_V2_0, BTT_SKR_MINI_E3_V3_0, BTT_SKR_MINI_E3_V3_0_1, BTT_SKR_E3_TURBO, BTT_OCTOPUS_V1_1, AQUILA_V101)
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#define LCD_SERIAL_PORT 1
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#elif MB(CREALITY_V24S1_301, CREALITY_V24S1_301F4, CREALITY_F401RE, CREALITY_V423, MKS_ROBIN, PANOWIN_CUTLASS, KODAMA_BARDO)
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#elif MB(CREALITY_V24S1_301, CREALITY_V24S1_301F4, CREALITY_F401RE, CREALITY_V423, CREALITY_CR4NTXXC10, MKS_ROBIN, PANOWIN_CUTLASS, KODAMA_BARDO)
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#define LCD_SERIAL_PORT 2
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#else
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#define LCD_SERIAL_PORT 3
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@ -100,15 +100,15 @@
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#define X_STEP_PIN PC2
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#define X_DIR_PIN PB9
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#define Y_ENABLE_PIN PC3
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#define Y_ENABLE_PIN X_ENABLE_PIN
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#define Y_STEP_PIN PB8
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#define Y_DIR_PIN PB7
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#define Z_ENABLE_PIN PC3
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#define Z_ENABLE_PIN X_ENABLE_PIN
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#define Z_STEP_PIN PB6
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#define Z_DIR_PIN PB5
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#define E0_ENABLE_PIN PC3
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#define E0_ENABLE_PIN X_ENABLE_PIN
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#define E0_STEP_PIN PB4
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#define E0_DIR_PIN PB3
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@ -142,9 +142,9 @@
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* If undefined software serial is used according to the pins below
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*/
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#define X_HARDWARE_SERIAL Serial6
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#define Y_HARDWARE_SERIAL Serial6
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#define Z_HARDWARE_SERIAL Serial6
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#define E0_HARDWARE_SERIAL Serial6
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#define Y_HARDWARE_SERIAL X_HARDWARE_SERIAL
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#define Z_HARDWARE_SERIAL X_HARDWARE_SERIAL
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#define E0_HARDWARE_SERIAL X_HARDWARE_SERIAL
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#ifndef X_SLAVE_ADDRESS
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#define X_SLAVE_ADDRESS 0
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@ -51,7 +51,7 @@
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20017FFB; /* end of RAM */
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_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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@ -60,8 +60,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
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FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
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}
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/* Define output sections */
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@ -746,9 +746,10 @@ board = genericSTM32F401RE
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board_build.variant = marlin_STM32F401RE_freeruns
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board_build.offset = 0x10000
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board_upload.offset_address = 0x08010000
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board_build.rename = firmware-{date}-{time}.bin
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build_flags = ${stm32_variant.build_flags} -DMCU_STM32F401RE -DSTM32F4
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-DSS_TIMER=4 -DTIMER_SERVO=TIM5
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-DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8
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-DTRANSFER_CLOCK_DIV=8
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build_unflags = ${stm32_variant.build_unflags} -DUSBCON -DUSBD_USE_CDC
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extra_scripts = ${stm32_variant.extra_scripts}
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pre:buildroot/share/PlatformIO/scripts/random-bin.py
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