⚡️ Improve TFT DMA for STM32 (#25359)
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@ -3292,11 +3292,11 @@
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*/
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#define TFT_FONT NOTOSANS
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//#define TFT_SHARED_SPI // SPI is shared between TFT display and other devices. Disable async data transfer
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//#define TFT_SHARED_IO // I/O is shared between TFT display and other devices. Disable async data transfer.
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#endif
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#if ENABLED(TFT_LVGL_UI)
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//#define MKS_WIFI_MODULE // MKS WiFi module
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//#define MKS_WIFI_MODULE // MKS WiFi module
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#endif
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/**
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@ -139,7 +139,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
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DataTransferBegin(DATASIZE_16BIT);
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SPIx.dmaSendAsync(Data, Count, MemoryIncrease);
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TERN_(TFT_SHARED_SPI, while (isBusy()));
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TERN_(TFT_SHARED_IO, while (isBusy()));
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}
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#endif // HAS_SPI_TFT
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@ -100,11 +100,11 @@ void TFT_FSMC::Init() {
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HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
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__HAL_RCC_DMA2_CLK_ENABLE();
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#ifdef STM32F1xx
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DMAtx.Instance = DMA2_Channel1;
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__HAL_RCC_DMA1_CLK_ENABLE();
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DMAtx.Instance = DMA1_Channel1;
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#elif defined(STM32F4xx)
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__HAL_RCC_DMA2_CLK_ENABLE();
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DMAtx.Instance = DMA2_Stream0;
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DMAtx.Init.Channel = DMA_CHANNEL_0;
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DMAtx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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@ -174,6 +174,8 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
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DMAtx.Init.PeriphInc = MemoryIncrease;
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HAL_DMA_Init(&DMAtx);
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HAL_DMA_Start(&DMAtx, (uint32_t)Data, (uint32_t)&(LCD->RAM), Count);
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TERN_(TFT_SHARED_IO, while (isBusy()));
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}
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void TFT_FSMC::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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@ -242,7 +242,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
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SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN); // Enable Tx DMA Request
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TERN_(TFT_SHARED_SPI, while (isBusy()));
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TERN_(TFT_SHARED_IO, while (isBusy()));
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}
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@ -261,6 +261,7 @@ void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count)
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SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN); // Enable Tx DMA Request
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HAL_DMA_PollForTransfer(&DMAtx, HAL_DMA_FULL_TRANSFER, HAL_MAX_DELAY);
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while ( __HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_BSY)) {}
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Abort();
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}
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@ -245,6 +245,8 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
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dma_set_num_transfers(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Count);
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dma_clear_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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dma_enable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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TERN_(TFT_SHARED_IO, while (isBusy()));
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}
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void TFT_FSMC::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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@ -30,6 +30,13 @@
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#include <libmaple/dma.h>
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#ifndef FSMC_DMA_DEV
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#define FSMC_DMA_DEV DMA2
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#endif
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#ifndef FSMC_DMA_CHANNEL
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#define FSMC_DMA_CHANNEL DMA_CH5
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#endif
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#define DATASIZE_8BIT DMA_SIZE_8BITS
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#define DATASIZE_16BIT DMA_SIZE_16BITS
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#define TFT_IO_DRIVER TFT_FSMC
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@ -154,7 +154,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
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DataTransferBegin();
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SPIx.dmaSendAsync(Data, Count, MemoryIncrease == DMA_MINC_ENABLE);
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TERN_(TFT_SHARED_SPI, while (isBusy()));
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TERN_(TFT_SHARED_IO, while (isBusy()));
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}
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void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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@ -698,6 +698,8 @@
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#error "DISABLE_INACTIVE_[XYZIJKUVWE] is now DISABLE_IDLE_[XYZIJKUVWE]."
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#elif defined(DEFAULT_STEPPER_DEACTIVE_TIME)
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#error "DEFAULT_STEPPER_DEACTIVE_TIME is now DEFAULT_STEPPER_TIMEOUT_SEC."
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#elif defined(TFT_SHARED_SPI)
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#error "TFT_SHARED_SPI is now TFT_SHARED_IO."
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#endif
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// L64xx stepper drivers have been removed
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@ -39,7 +39,7 @@
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#define ILI9328_ETMOD_ID0 0x0010 // 0 - Horizontal Decrement / 1 - Horizontal Increment
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#define ILI9328_ETMOD_AM 0x0008 // 0 - Horizontal / 1 - Vertical
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// MKS Robin TFT v1.1 - 320x240 ; Cable on the left side
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// MKS Robin TFT v1.1 - 320x240 ; FPC cable on the left side
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#if TFT_ROTATION == TFT_ROTATE_180
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#define ILI9328_DRVCTL_DATA 0x0000
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@ -33,10 +33,10 @@
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#define ILI9341_MADCTL_RGB 0x00
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#define ILI9341_MADCTL_MH 0x04 // Horizontal Refresh Order
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#define ILI9341_ORIENTATION_UP ILI9341_MADCTL_MY // 240x320 ; Cable on the upper side
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#define ILI9341_ORIENTATION_RIGHT ILI9341_MADCTL_MV // 320x240 ; Cable on the right side
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#define ILI9341_ORIENTATION_LEFT ILI9341_MADCTL_MY | ILI9341_MADCTL_MX | ILI9341_MADCTL_MV // 320x240 ; Cable on the left side
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#define ILI9341_ORIENTATION_DOWN ILI9341_MADCTL_MX // 240x320 ; Cable on the upper side
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#define ILI9341_ORIENTATION_TOP ILI9341_MADCTL_MY // 240x320 ; FPC cable on the top side
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#define ILI9341_ORIENTATION_RIGHT ILI9341_MADCTL_MV // 320x240 ; FPC cable on the right side
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#define ILI9341_ORIENTATION_LEFT ILI9341_MADCTL_MY | ILI9341_MADCTL_MX | ILI9341_MADCTL_MV // 320x240 ; FPC cable on the left side
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#define ILI9341_ORIENTATION_BOTTOM ILI9341_MADCTL_MX // 240x320 ; FPC cable on the bottom side
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#define ILI9341_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, ILI9341_MADCTL_MV) | \
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IF_0((TFT_ORIENTATION) & TFT_INVERT_X, ILI9341_MADCTL_MX) | \
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@ -52,7 +52,7 @@
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#define ILI9341_NOP 0x00 // No Operation
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#define ILI9341_SWRESET 0x01 // Software Reset
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#define ILI9341_RDDIDIF 0x04 // Read display identification information
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#define ILI9341_RDDIDIF 0x04 // Read Display Identification Information
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#define ILI9341_RDDST 0x09 // Read Display Status
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#define ILI9341_RDDPM 0x0A // Read Display Power Mode
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#define ILI9341_RDDMADCTL 0x0B // Read Display MADCTL
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@ -141,20 +141,21 @@ static const uint16_t ili9341_init[] = {
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DATASIZE_8BIT,
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ESC_REG(ILI9341_SWRESET), ESC_DELAY(100),
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ESC_REG(ILI9341_SLPOUT), ESC_DELAY(20),
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/*
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ESC_REG(ILI9341_PWCTRLA), 0x0039, 0x002C, 0x0000, 0x0034, 0x0002, // Power control A
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ESC_REG(ILI9341_PWCTRLB), 0x0000, 0x00C1, 0x0030, // Power control B
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ESC_REG(ILI9341_DRVTCTLA1), 0x0085, 0x0000, 0x0078, // Driver timing control A
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ESC_REG(ILI9341_DRVTCTLB), 0x0000, 0x0000, // Driver timing control B
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ESC_REG(ILI9341_PONSEQCTL), 0x0064, 0x0003, 0x0012, 0x0081, // Power on sequence control
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ESC_REG(ILI9341_DISCTRL), 0x0008, 0x0082, 0x0027, // Display Function Control
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ESC_REG(ILI9341_PUMPRCTL), 0x0020, // Pump ratio control
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ESC_REG(ILI9341_VMCTRL1), 0x003E, 0x0028, // VCOM Control 1
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ESC_REG(ILI9341_VMCTRL2), 0x0086, // VCOM Control 2
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ESC_REG(ILI9341_FRMCTR1), 0x0000, 0x0018, // Frame Rate Control (In Normal Mode/Full Colors)
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ESC_REG(ILI9341_PWCTRL1), 0x0023, // Power Control 1
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ESC_REG(ILI9341_PWCTRL2), 0x0010, // Power Control 2
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*/
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ESC_REG(ILI9341_PWCTRLA), 0x0039, 0x002C, 0x0000, 0x0034, 0x0002,
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ESC_REG(ILI9341_PWCTRLB), 0x0000, 0x00C1, 0x0030,
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ESC_REG(ILI9341_DRVTCTLA1), 0x0085, 0x0000, 0x0078,
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ESC_REG(ILI9341_DRVTCTLB), 0x0000, 0x0000,
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ESC_REG(ILI9341_PONSEQCTL), 0x0064, 0x0003, 0x0012, 0x0081,
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ESC_REG(ILI9341_DISCTRL), 0x0008, 0x0082, 0x0027, // Source Output Scan Direction: 0, Gate Output Scan Direction: 0
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ESC_REG(ILI9341_DINVOFF),
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ESC_REG(ILI9341_PUMPRCTL), 0x0020,
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ESC_REG(ILI9341_VMCTRL1), 0x003E, 0x0028,
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ESC_REG(ILI9341_VMCTRL2), 0x0086,
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ESC_REG(ILI9341_FRMCTR1), 0x0000, 0x0018,
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ESC_REG(ILI9341_PWCTRL1), 0x0023,
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ESC_REG(ILI9341_PWCTRL2), 0x0010,
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ESC_REG(ILI9341_MADCTL), ILI9341_MADCTL_DATA,
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ESC_REG(ILI9341_PIXSET), 0x0055,
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@ -25,18 +25,18 @@
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#include "../../inc/MarlinConfig.h"
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#define ILI9488_MADCTL_MY 0x80 // Row Address Order
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#define ILI9488_MADCTL_MX 0x40 // Column Address Order
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#define ILI9488_MADCTL_MV 0x20 // Row/Column Exchange
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#define ILI9488_MADCTL_ML 0x10 // Vertical Refresh Order
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#define ILI9488_MADCTL_BGR 0x08 // RGB-BGR ORDER
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#define ILI9488_MADCTL_RGB 0x00
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#define ILI9488_MADCTL_MH 0x04 // Horizontal Refresh Order
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#define ILI9488_MADCTL_MY 0x80 // Row Address Order
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#define ILI9488_MADCTL_MX 0x40 // Column Address Order
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#define ILI9488_MADCTL_MV 0x20 // Row/Column Exchange
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#define ILI9488_MADCTL_ML 0x10 // Vertical Refresh Order
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#define ILI9488_MADCTL_BGR 0x08 // RGB-BGR ORDER
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#define ILI9488_MADCTL_RGB 0x00
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#define ILI9488_MADCTL_MH 0x04 // Horizontal Refresh Order
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#define ILI9488_ORIENTATION_UP ILI9488_MADCTL_MY // 320x480 ; Cable on the upper side
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#define ILI9488_ORIENTATION_RIGHT ILI9488_MADCTL_MV // 480x320 ; Cable on the right side
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#define ILI9488_ORIENTATION_LEFT ILI9488_MADCTL_MY | ILI9488_MADCTL_MX | ILI9488_MADCTL_MV // 480x320 ; Cable on the left side
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#define ILI9488_ORIENTATION_DOWN ILI9488_MADCTL_MX // 320x480 ; Cable on the upper side
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#define ILI9488_ORIENTATION_TOP ILI9488_MADCTL_MY // 320x480 ; FPC cable on the top side
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#define ILI9488_ORIENTATION_RIGHT ILI9488_MADCTL_MV // 480x320 ; FPC cable on the right side
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#define ILI9488_ORIENTATION_LEFT ILI9488_MADCTL_MY | ILI9488_MADCTL_MX | ILI9488_MADCTL_MV // 480x320 ; FPC cable on the left side
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#define ILI9488_ORIENTATION_BOTTOM ILI9488_MADCTL_MX // 320x480 ; FPC cable on the bottom side
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#define ILI9488_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, ILI9488_MADCTL_MV) | \
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IF_0((TFT_ORIENTATION) & TFT_INVERT_X, ILI9488_MADCTL_MX) | \
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#define ILI9488_COLOR ILI9488_MADCTL_RGB
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#endif
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#define ILI9488_MADCTL_DATA (ILI9488_ORIENTATION) | (ILI9488_COLOR)
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#define ILI9488_MADCTL_DATA (ILI9488_ORIENTATION) | (ILI9488_COLOR)
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#define ILI9488_NOP 0x00 // No Operation
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#define ILI9488_SWRESET 0x01 // Software Reset
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#define ILI9488_RDDIDIF 0x04 // Read Display Identification Information
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#define ILI9488_RDNUMED 0x05 // Read Number of the Errors on DSI
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#define ILI9488_RDDST 0x09 // Read Display Status
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#define ILI9488_RDDPM 0x0A // Read Display Power Mode
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#define ILI9488_RDDMADCTL 0x0B // Read Display MADCTL
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#define ILI9488_RDDCOLMOD 0x0C // Read Display COLMOD
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#define ILI9488_RDDIM 0x0D // Read Display Image Mode
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#define ILI9488_RDDSM 0x0E // Read Display Signal Mode
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#define ILI9488_RDDSDR 0x0F // Read Display Self-Diagnostic Result
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#define ILI9488_SLPIN 0x10 // Sleep IN
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#define ILI9488_SLPOUT 0x11 // Sleep OUT
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#define ILI9488_PTLON 0x12 // Partial Mode ON
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#define ILI9488_NORON 0x13 // Normal Display Mode ON
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#define ILI9488_INVOFF 0x20 // Display Inversion OFF
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#define ILI9488_INVON 0x21 // Display Inversion ON
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#define ILI9488_ALLPOFF 0x22 // All Pixels OFF
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#define ILI9488_ALLPON 0x23 // All Pixels ON
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#define ILI9488_DISOFF 0x28 // Display OFF
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#define ILI9488_DISON 0x29 // Display ON
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#define ILI9488_CASET 0x2A // Column Address Set
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#define ILI9488_PASET 0x2B // Page Address Set
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#define ILI9488_RAMWR 0x2C // Memory Write
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#define ILI9488_RAMRD 0x2E // Memory Read
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#define ILI9488_PLTAR 0x30 // Partial Area
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#define ILI9488_VSCRDEF 0x33 // Vertical Scrolling Definition
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#define ILI9488_TEOFF 0x34 // Tearing Effect Line OFF
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#define ILI9488_TEON 0x35 // Tearing Effect Line ON
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#define ILI9488_MADCTL 0x36 // Memory Access Control
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#define ILI9488_VSCRSADD 0x37 // Vertical Scrolling Start Address
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#define ILI9488_IDMOFF 0x38 // Idle Mode OFF
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#define ILI9488_IDMON 0x39 // Idle Mode ON
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#define ILI9488_COLMOD 0x3A // Interface Pixel Format
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#define ILI9488_RAMWRC 0x3C // Memory Write Continue
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#define ILI9488_RAMRDRC 0x3E // Memory Read Continue
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#define ILI9488_TESLWR 0x44 // Write Tear Scan Line
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#define ILI9488_TESLRD 0x45 // Read Scan Line
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#define ILI9488_WRDISBV 0x51 // Write Display Brightness Value
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#define ILI9488_RDDISBV 0x52 // Read Display Brightness Value
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#define ILI9488_WRCTRLD 0x53 // Write Control Display Value
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#define ILI9488_RDCTRLD 0x54 // Read Control Display Value
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#define ILI9488_WRCABC 0x55 // Write Content Adaptive Brightness Control Value
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#define ILI9488_RDCABC 0x56 // Read Content Adaptive Brightness Control Value
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#define ILI9488_WRCABCMB 0x5E // Write CABC Minimum Brightness
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#define ILI9488_RDCABCMB 0x5F // Read CABC Minimum Brightness
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#define ILI9488_RDABCSDR 0x68 // Read Automatic Brightness Control Self-diagnostic Result
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#define ILI9488_RDID1 0xDA // Read ID1
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#define ILI9488_RDID2 0xDB // Read ID2
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#define ILI9488_RDID3 0xDC // Read ID3
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#define ILI9488_NOP 0x00 // No Operation
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#define ILI9488_SWRESET 0x01 // Software Reset
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#define ILI9488_RDDIDIF 0x04 // Read Display Identification Information
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#define ILI9488_RDNUMED 0x05 // Read Number of the Errors on DSI
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#define ILI9488_RDDST 0x09 // Read Display Status
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#define ILI9488_RDDPM 0x0A // Read Display Power Mode
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#define ILI9488_RDDMADCTL 0x0B // Read Display MADCTL
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#define ILI9488_RDDCOLMOD 0x0C // Read Display COLMOD
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#define ILI9488_RDDIM 0x0D // Read Display Image Mode
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#define ILI9488_RDDSM 0x0E // Read Display Signal Mode
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#define ILI9488_RDDSDR 0x0F // Read Display Self-Diagnostic Result
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#define ILI9488_SLPIN 0x10 // Sleep IN
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#define ILI9488_SLPOUT 0x11 // Sleep OUT
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#define ILI9488_PTLON 0x12 // Partial Mode ON
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#define ILI9488_NORON 0x13 // Normal Display Mode ON
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#define ILI9488_INVOFF 0x20 // Display Inversion OFF
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#define ILI9488_INVON 0x21 // Display Inversion ON
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#define ILI9488_ALLPOFF 0x22 // All Pixels OFF
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#define ILI9488_ALLPON 0x23 // All Pixels ON
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#define ILI9488_DISOFF 0x28 // Display OFF
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#define ILI9488_DISON 0x29 // Display ON
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#define ILI9488_CASET 0x2A // Column Address Set
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#define ILI9488_PASET 0x2B // Page Address Set
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#define ILI9488_RAMWR 0x2C // Memory Write
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#define ILI9488_RAMRD 0x2E // Memory Read
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#define ILI9488_PLTAR 0x30 // Partial Area
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#define ILI9488_VSCRDEF 0x33 // Vertical Scrolling Definition
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#define ILI9488_TEOFF 0x34 // Tearing Effect Line OFF
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#define ILI9488_TEON 0x35 // Tearing Effect Line ON
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#define ILI9488_MADCTL 0x36 // Memory Access Control
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#define ILI9488_VSCRSADD 0x37 // Vertical Scrolling Start Address
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#define ILI9488_IDMOFF 0x38 // Idle Mode OFF
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#define ILI9488_IDMON 0x39 // Idle Mode ON
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#define ILI9488_COLMOD 0x3A // Interface Pixel Format
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#define ILI9488_RAMWRC 0x3C // Memory Write Continue
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#define ILI9488_RAMRDRC 0x3E // Memory Read Continue
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#define ILI9488_TESLWR 0x44 // Write Tear Scan Line
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#define ILI9488_TESLRD 0x45 // Read Scan Line
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#define ILI9488_WRDISBV 0x51 // Write Display Brightness Value
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#define ILI9488_RDDISBV 0x52 // Read Display Brightness Value
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#define ILI9488_WRCTRLD 0x53 // Write Control Display Value
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#define ILI9488_RDCTRLD 0x54 // Read Control Display Value
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#define ILI9488_WRCABC 0x55 // Write Content Adaptive Brightness Control Value
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#define ILI9488_RDCABC 0x56 // Read Content Adaptive Brightness Control Value
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#define ILI9488_WRCABCMB 0x5E // Write CABC Minimum Brightness
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#define ILI9488_RDCABCMB 0x5F // Read CABC Minimum Brightness
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#define ILI9488_RDABCSDR 0x68 // Read Automatic Brightness Control Self-diagnostic Result
|
||||
#define ILI9488_RDID1 0xDA // Read ID1
|
||||
#define ILI9488_RDID2 0xDB // Read ID2
|
||||
#define ILI9488_RDID3 0xDC // Read ID3
|
||||
|
||||
#define ILI9488_IFMODE 0xB0 // Interface Mode Control
|
||||
#define ILI9488_FRMCTR1 0xB1 // Frame Rate Control (In Normal Mode/Full Colors)
|
||||
#define ILI9488_FRMCTR2 0xB2 // Frame Rate Control (In Idle Mode/8 Colors)
|
||||
#define ILI9488_FRMCTR3 0xB3 // Frame Rate Control (In Partial Mode/Full Colors)
|
||||
#define ILI9488_INVTR 0xB4 // Display Inversion Control
|
||||
#define ILI9488_PRCTR 0xB5 // Blanking Porch Control
|
||||
#define ILI9488_DISCTRL 0xB6 // Display Function Control
|
||||
#define ILI9488_ETMOD 0xB7 // Entry Mode Set
|
||||
#define ILI9488_CECTRL1 0xB9 // Color Enhancement Control 1
|
||||
#define ILI9488_CECTRL2 0xBA // Color Enhancement Control 2
|
||||
#define ILI9488_HSLCTRL 0xBE // HS Lanes Control
|
||||
#define ILI9488_PWCTRL1 0xC0 // Power Control 1
|
||||
#define ILI9488_PWCTRL2 0xC1 // Power Control 2
|
||||
#define ILI9488_PWCTRL3 0xC2 // Power Control 3 (For Normal Mode)
|
||||
#define ILI9488_PWCTRL4 0xC3 // Power Control 4 (For Idle Mode)
|
||||
#define ILI9488_PWCTRL5 0xC4 // Power Control 5 (For Partial Mode)
|
||||
#define ILI9488_VMCTRL 0xC5 // VCOM Control
|
||||
#define ILI9488_CABCCTRL1 0xC6 // CABC Control 1
|
||||
#define ILI9488_CABCCTRL2 0xC8 // CABC Control 2
|
||||
#define ILI9488_CABCCTRL3 0xC9 // CABC Control 3
|
||||
#define ILI9488_CABCCTRL4 0xCA // CABC Control 4
|
||||
#define ILI9488_CABCCTRL5 0xCB // CABC Control 5
|
||||
#define ILI9488_CABCCTRL6 0xCC // CABC Control 6
|
||||
#define ILI9488_CABCCTRL7 0xCD // CABC Control 7
|
||||
#define ILI9488_CABCCTRL8 0xCE // CABC Control 8
|
||||
#define ILI9488_CABCCTRL9 0xCF // CABC Control 9
|
||||
#define ILI9488_NVMWR 0xD0 // NV Memory Write
|
||||
#define ILI9488_NVMPKEY 0xD1 // NV Memory Protection Key
|
||||
#define ILI9488_RDNVM 0xD2 // NV Memory Status Read
|
||||
#define ILI9488_RDID4 0xD3 // Read ID4 - 0x009488
|
||||
#define ILI9488_ADJCTL1 0xD7 // Adjust Control 1
|
||||
#define ILI9488_RDIDV 0xD8 // Read ID Version
|
||||
#define ILI9488_PGAMCTRL 0xE0 // Positive Gamma Control
|
||||
#define ILI9488_NGAMCTRL 0xE1 // Negative Gamma Control
|
||||
#define ILI9488_DGAMCTRL1 0xE2 // Ditigal Gamma Control 1
|
||||
#define ILI9488_DGAMCTRL2 0xE3 // Ditigal Gamma Control 2
|
||||
#define ILI9488_SETIMAGE 0xE9 // Set Image Function
|
||||
#define ILI9488_ADJCTL2 0xF2 // Adjust Control 2
|
||||
#define ILI9488_ADJCTL3 0xF7 // Adjust Control 3
|
||||
#define ILI9488_ADJCTL4 0xF8 // Adjust Control 4
|
||||
#define ILI9488_ADJCTL5 0xF9 // Adjust Control 5
|
||||
#define ILI9488_RDEXTC 0xFB // Read EXTC command is SPI mode
|
||||
#define ILI9488_ADJCTL6 0xFC // Adjust Control 6
|
||||
#define ILI9488_ADJCTL7 0xFF // Adjust Control 7
|
||||
#define ILI9488_IFMODE 0xB0 // Interface Mode Control
|
||||
#define ILI9488_FRMCTR1 0xB1 // Frame Rate Control (In Normal Mode/Full Colors)
|
||||
#define ILI9488_FRMCTR2 0xB2 // Frame Rate Control (In Idle Mode/8 Colors)
|
||||
#define ILI9488_FRMCTR3 0xB3 // Frame Rate Control (In Partial Mode/Full Colors)
|
||||
#define ILI9488_INVTR 0xB4 // Display Inversion Control
|
||||
#define ILI9488_PRCTR 0xB5 // Blanking Porch Control
|
||||
#define ILI9488_DISCTRL 0xB6 // Display Function Control
|
||||
#define ILI9488_ETMOD 0xB7 // Entry Mode Set
|
||||
#define ILI9488_CECTRL1 0xB9 // Color Enhancement Control 1
|
||||
#define ILI9488_CECTRL2 0xBA // Color Enhancement Control 2
|
||||
#define ILI9488_HSLCTRL 0xBE // HS Lanes Control
|
||||
#define ILI9488_PWCTRL1 0xC0 // Power Control 1
|
||||
#define ILI9488_PWCTRL2 0xC1 // Power Control 2
|
||||
#define ILI9488_PWCTRL3 0xC2 // Power Control 3 (For Normal Mode)
|
||||
#define ILI9488_PWCTRL4 0xC3 // Power Control 4 (For Idle Mode)
|
||||
#define ILI9488_PWCTRL5 0xC4 // Power Control 5 (For Partial Mode)
|
||||
#define ILI9488_VMCTRL 0xC5 // VCOM Control
|
||||
#define ILI9488_CABCCTRL1 0xC6 // CABC Control 1
|
||||
#define ILI9488_CABCCTRL2 0xC8 // CABC Control 2
|
||||
#define ILI9488_CABCCTRL3 0xC9 // CABC Control 3
|
||||
#define ILI9488_CABCCTRL4 0xCA // CABC Control 4
|
||||
#define ILI9488_CABCCTRL5 0xCB // CABC Control 5
|
||||
#define ILI9488_CABCCTRL6 0xCC // CABC Control 6
|
||||
#define ILI9488_CABCCTRL7 0xCD // CABC Control 7
|
||||
#define ILI9488_CABCCTRL8 0xCE // CABC Control 8
|
||||
#define ILI9488_CABCCTRL9 0xCF // CABC Control 9
|
||||
#define ILI9488_NVMWR 0xD0 // NV Memory Write
|
||||
#define ILI9488_NVMPKEY 0xD1 // NV Memory Protection Key
|
||||
#define ILI9488_RDNVM 0xD2 // NV Memory Status Read
|
||||
#define ILI9488_RDID4 0xD3 // Read ID4 - 0x009488
|
||||
#define ILI9488_ADJCTL1 0xD7 // Adjust Control 1
|
||||
#define ILI9488_RDIDV 0xD8 // Read ID Version
|
||||
#define ILI9488_PGAMCTRL 0xE0 // Positive Gamma Control
|
||||
#define ILI9488_NGAMCTRL 0xE1 // Negative Gamma Control
|
||||
#define ILI9488_DGAMCTRL1 0xE2 // Ditigal Gamma Control 1
|
||||
#define ILI9488_DGAMCTRL2 0xE3 // Ditigal Gamma Control 2
|
||||
#define ILI9488_SETIMAGE 0xE9 // Set Image Function
|
||||
#define ILI9488_ADJCTL2 0xF2 // Adjust Control 2
|
||||
#define ILI9488_ADJCTL3 0xF7 // Adjust Control 3
|
||||
#define ILI9488_ADJCTL4 0xF8 // Adjust Control 4
|
||||
#define ILI9488_ADJCTL5 0xF9 // Adjust Control 5
|
||||
#define ILI9488_RDEXTC 0xFB // Read EXTC command is SPI mode
|
||||
#define ILI9488_ADJCTL6 0xFC // Adjust Control 6
|
||||
#define ILI9488_ADJCTL7 0xFF // Adjust Control 7
|
||||
|
||||
#if 0
|
||||
// https://forum.mikroe.com/viewtopic.php?t=74586
|
||||
#if ANY(MKS_ROBIN_TFT35, TFT_TRONXY_X5SA, ANYCUBIC_TFT35) // ILI9488
|
||||
#define TFT_DRIVER ILI9488
|
||||
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
|
||||
#define TFT_RES_480x320
|
||||
#define TFT_INTERFACE_FSMC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static const uint16_t ili9488_init[] = {
|
||||
DATASIZE_8BIT,
|
||||
|
@ -154,10 +164,20 @@ static const uint16_t ili9488_init[] = {
|
|||
ESC_REG(ILI9488_MADCTL), ILI9488_MADCTL_DATA,
|
||||
ESC_REG(ILI9488_COLMOD), 0x0055,
|
||||
|
||||
ESC_REG(ILI9488_FRMCTR1), 0x00A0,
|
||||
ESC_REG(ILI9488_INVTR), 0x0002,
|
||||
ESC_REG(ILI9488_DISCTRL), 0x0002, 0x0002, // Gate Scan sequence: 0, Source Scan sequence: 0
|
||||
ESC_REG(ILI9488_PWCTRL1), 0x0015, 0x0017,
|
||||
ESC_REG(ILI9488_PWCTRL2), 0x0041,
|
||||
ESC_REG(ILI9488_VMCTRL), 0x0000, 0x0012, 0x0080,
|
||||
ESC_REG(ILI9488_SETIMAGE), 0x0000,
|
||||
ESC_REG(ILI9488_ADJCTL3), 0x00A9, 0x0051, 0x002C, 0x0082,
|
||||
|
||||
/* Gamma Correction. */
|
||||
ESC_REG(ILI9488_PGAMCTRL), 0x0000, 0x0003, 0x0009, 0x0008, 0x0016, 0x000A, 0x003F, 0x0078, 0x004C, 0x0009, 0x000A, 0x0008, 0x0016, 0x001A, 0x000F,
|
||||
ESC_REG(ILI9488_NGAMCTRL), 0x0000, 0x0016, 0x0019, 0x0003, 0x000F, 0x0005, 0x0032, 0x0045, 0x0046, 0x0004, 0x000E, 0x000D, 0x0035, 0x0037, 0x000F,
|
||||
|
||||
ESC_REG(TERN(ILI9488_INVERTED, ILI9488_INVON, ILI9488_INVOFF)), // Display inversion
|
||||
ESC_REG(ILI9488_NORON),
|
||||
ESC_REG(ILI9488_DISON),
|
||||
ESC_END
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
|
||||
#define R61505_DRVCTRL_GS 0x8000 // Gate Scan direction
|
||||
|
||||
// MKS Robin TFT v1.1 - 320x240 ; Cable on the left side
|
||||
// MKS Robin TFT v1.1 - 320x240 ; FPC cable on the left side
|
||||
|
||||
#if TFT_ROTATION == TFT_ROTATE_180
|
||||
#define R61505_DRVCTL_DATA 0x0000
|
||||
|
|
|
@ -33,10 +33,11 @@
|
|||
#define ST7789V_MADCTL_RGB 0x00
|
||||
#define ST7789V_MADCTL_MH 0x04 // Horizontal Refresh Order
|
||||
|
||||
#define ST7789V_ORIENTATION_UP ST7789V_MADCTL_MX | ST7789V_MADCTL_MY // 240x320 ; Cable on the upper side
|
||||
#define ST7789V_ORIENTATION_RIGHT ST7789V_MADCTL_MX | ST7789V_MADCTL_MV // 320x240 ; Cable on the right side
|
||||
#define ST7789V_ORIENTATION_LEFT ST7789V_MADCTL_MY | ST7789V_MADCTL_MV // 320x240 ; Cable on the left side
|
||||
#define ST7789V_ORIENTATION_DOWN 0 // 240x320 ; Cable on the lower side
|
||||
// ST7789V-specific: "MX Inversion" is enabled by default in LCM Control register.
|
||||
#define ST7789V_ORIENTATION_TOP ST7789V_MADCTL_MX | ST7789V_MADCTL_MY // 240x320 ; PFC cable on the top side
|
||||
#define ST7789V_ORIENTATION_RIGHT ST7789V_MADCTL_MX | ST7789V_MADCTL_MV // 320x240 ; PFC cable on the right side
|
||||
#define ST7789V_ORIENTATION_LEFT ST7789V_MADCTL_MY | ST7789V_MADCTL_MV // 320x240 ; PFC cable on the left side
|
||||
#define ST7789V_ORIENTATION_BOTTOM 0 // 240x320 ; PFC cable on the bottom side
|
||||
|
||||
#define ST7789V_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, ST7789V_MADCTL_MV) | \
|
||||
IF_0((TFT_ORIENTATION) & TFT_INVERT_X, ST7789V_MADCTL_MX) | \
|
||||
|
@ -141,7 +142,22 @@ static const uint16_t st7789v_init[] = {
|
|||
ESC_REG(ST7789V_PORCTRL), 0x000C, 0x000C, 0x0000, 0x0033, 0x0033,
|
||||
ESC_REG(ST7789V_GCTRL), 0x0035,
|
||||
ESC_REG(ST7789V_VCOMS), 0x001F,
|
||||
ESC_REG(ST7789V_LCMCTRL), 0x002C,
|
||||
|
||||
/**
|
||||
* LCM Control
|
||||
*
|
||||
* Default Power-on Value: 0x2C / 00101100b
|
||||
* MY Inversion: 0
|
||||
* RGB/BGR Inversion: 1
|
||||
* Display Inversion: 0
|
||||
* MX Inversion: 1
|
||||
* MH (Source Output) Inversion: 1
|
||||
* MV Inversion: 0
|
||||
* Gate Scan Inversion: 0
|
||||
*/
|
||||
ESC_REG(ST7789V_LCMCTRL), 0x002C, // Default Power-on Value
|
||||
ESC_REG(ST7789V_GATECTRL), 0x0027, 0x0000, 0x0010, // Gate Scan Direction: 0
|
||||
|
||||
ESC_REG(ST7789V_VDVVRHEN), 0x0001, 0x00C3,
|
||||
ESC_REG(ST7789V_VDVS), 0x0020,
|
||||
ESC_REG(ST7789V_FRCTRL2), 0x000F,
|
||||
|
|
|
@ -33,6 +33,11 @@
|
|||
#define ST7796S_MADCTL_RGB 0x00
|
||||
#define ST7796S_MADCTL_MH 0x04 // Horizontal Refresh Order
|
||||
|
||||
#define ST7796S_ORIENTATION_TOP ST7796S_MADCTL_MX // 320x480 ; FPC cable on the top side
|
||||
#define ST7796S_ORIENTATION_RIGHT ST7796S_MADCTL_MV // 480x320 ; FPC cable on the right side
|
||||
#define ST7796S_ORIENTATION_LEFT ST7796S_MADCTL_MY | ST7796S_MADCTL_MX | ST7796S_MADCTL_MV // 480x320 ; FPC cable on the left side
|
||||
#define ST7796S_ORIENTATION_BOTTOM ST7796S_MADCTL_MY // 320x480 ; FPC cable on the bottom side
|
||||
|
||||
#define ST7796S_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, ST7796S_MADCTL_MV) | \
|
||||
IF_0((TFT_ORIENTATION) & TFT_INVERT_X, ST7796S_MADCTL_MX) | \
|
||||
IF_0((TFT_ORIENTATION) & TFT_INVERT_Y, ST7796S_MADCTL_MY)
|
||||
|
@ -132,6 +137,7 @@ static const uint16_t st7796s_init[] = {
|
|||
ESC_REG(ST7796S_COLMOD), 0x0055,
|
||||
|
||||
ESC_REG(ST7796S_DIC), 0x0001, // 1-dot inversion
|
||||
ESC_REG(ST7796S_DFC), 0x0080, 0x0002, 0x003B, // Source Output Scan Direction: 0, Gate Output Scan Direction: 0
|
||||
ESC_REG(ST7796S_EM), 0x00C6,
|
||||
|
||||
ESC_REG(ST7796S_PWR2), 0x0015,
|
||||
|
@ -144,11 +150,7 @@ static const uint16_t st7796s_init[] = {
|
|||
ESC_REG(ST7796S_PGC), 0x00F0, 0x0004, 0x0008, 0x0009, 0x0008, 0x0015, 0x002F, 0x0042, 0x0046, 0x0028, 0x0015, 0x0016, 0x0029, 0x002D,
|
||||
ESC_REG(ST7796S_NGC), 0x00F0, 0x0004, 0x0009, 0x0009, 0x0008, 0x0015, 0x002E, 0x0046, 0x0046, 0x0028, 0x0015, 0x0015, 0x0029, 0x002D,
|
||||
|
||||
#if ENABLED(ST7796S_INVERTED)
|
||||
ESC_REG(ST7796S_INVON), // Display inversion ON
|
||||
#else
|
||||
ESC_REG(ST7796S_NORON),
|
||||
#endif
|
||||
ESC_REG(TERN(ST7796S_INVERTED, ST7796S_INVON, ST7796S_NORON)), // Display inversion
|
||||
ESC_REG(ST7796S_WRCTRLD), 0x0024,
|
||||
ESC_REG(ST7796S_CSCON), 0x003C, // disable command 2 part I
|
||||
ESC_REG(ST7796S_CSCON), 0x0069, // disable command 2 part II
|
||||
|
|
|
@ -140,8 +140,6 @@
|
|||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_CS_PIN PD7
|
||||
#define FSMC_RS_PIN PD11
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -293,8 +293,6 @@
|
|||
#define TFT_BACKLIGHT_PIN PD13
|
||||
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define FSMC_CS_PIN PD7 // NE4
|
||||
#define FSMC_RS_PIN PD11 // A0
|
||||
|
|
|
@ -117,8 +117,6 @@
|
|||
#define FSMC_RS_PIN PG0
|
||||
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -138,8 +138,6 @@
|
|||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_CS_PIN PD7 // pin 88 = FSMC_NE1
|
||||
#define FSMC_RS_PIN PD11 // pin 58 A16 Register. Only one address needed
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -143,8 +143,6 @@
|
|||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_CS_PIN PD7 // NE4
|
||||
#define FSMC_RS_PIN PG0 // A0
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -176,8 +176,6 @@
|
|||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_CS_PIN PG12 // NE4
|
||||
#define FSMC_RS_PIN PF0 // A0
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -160,8 +160,6 @@
|
|||
#define FSMC_RS_PIN TFT_RS_PIN // A0
|
||||
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#if NEED_TOUCH_PINS
|
||||
#define TOUCH_CS_PIN PC2 // SPI2_NSS
|
||||
|
|
|
@ -196,8 +196,6 @@
|
|||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_CS_PIN PD7
|
||||
#define FSMC_RS_PIN PD11
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -231,8 +231,6 @@
|
|||
|
||||
#define FSMC_CS_PIN PD7 // NE4
|
||||
#define FSMC_RS_PIN PD11 // A0
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define TFT_CS_PIN FSMC_CS_PIN
|
||||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
|
|
@ -153,8 +153,6 @@
|
|||
#define TFT_RS_PIN FSMC_RS_PIN
|
||||
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define ANYCUBIC_TFT35
|
||||
#else
|
||||
|
|
|
@ -200,8 +200,6 @@
|
|||
#define TFT_BACKLIGHT_PIN PG8
|
||||
|
||||
#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
|
||||
#define FSMC_DMA_DEV DMA2
|
||||
#define FSMC_DMA_CHANNEL DMA_CH5
|
||||
|
||||
#define TFT_CS_PIN PG12
|
||||
#define TFT_RS_PIN PG2
|
||||
|
|
Loading…
Reference in a new issue